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Recovery of Clock Phase from Temperature Data
In the discussion below, it will be convenient to define clock phase as clock time modulo the nominal clock period of 8s. As presented in figures that follow, the observing clock phase is just the milliseconds of the time comparison with the KSC clock since it usually takes over a month for the drift in clock phase to accumulate to as much as one second. The synthesized clock phase is the integral with respect to clock cycle of the synthesized clock period inferred from the temperature data. A constant of integration is available in the integration which can be used to make the synthesized phase match the observed clock phase as closely as possible. For the present purposes, this constant was chosen by eye rather than by fitting, since the overall match is not particularly good. A example of this comparison is shown in Figure 6a. In this figure, the diagonal crosses represent actual clock measurements, while the continuous line is the integral of the synthesized clock period shown in Figure 5. The synthesized clock phase from the temperature data follows the measured clock phase in long-term behavior, but there are disagreements in details. The differences are shown better in Figure 6b, where the clock period is interpolated linearly between consecutive comparisons of the clock with the ground station, and the resulting piece-wise linear clock phase is subtracted from the temperature-inferred clock phase. The locations of the clock comparisons are indicated by symbols at a phase difference of zero, while the line indicate the difference between the temperature-inferred phase and the piece-wise linear phase from the clock measurements. The excursions with large curvature seen in Figure 6b are generally caused by a change in clock rate due to a change in the temperature, and are actually the kind of behavior that this analysis is intended to recover. The success of the analysis rests to a large extent on confidence that the temperature dependence is modeled well, which can be verified by the agreement of the two phase determination at the times of clock measurements. The agreement of the two determinations of clock phase is not perfect, as there are sometimes fairly large phase drifts of up to 10 ms across sets of remote orbits. This phase drift could arise from a bias in the average temperature from incomplete sampling of the day-night temperature cycle. This day-night cycle is caused by the passage of the satellite in and out of the Earth's shadow during the course of every orbit, and its effect on the internal temperature of the satellite is illustrated Figure 7a for the sensor CP-4. The temperature data has been averaged over ten minute intervals, and shows a clear 1°C variation with a period close to the orbital period of 97 minutes. For the interval 1988 August 22 to 1988 September 3, the day-night variation of the combined temperature (whose coefficients are given in Table 1) closely follows the formula ![]() where the time t is MJD. We can estimate the effect of this temperature variation on clock phase by repeating the steps that generated Figures 6a and 6b. Here, however, we average the combination temperature every ten minutes, convert this temperature into clock period using Figure 4b, and integrate the period to get the clock phase shown in Figure 7b. The day-night cycle in the clock phase can be seen very clearly in this figure. We tried to remove the effect of incomplete sampling of the temperature through the day-night cycle by subtracting the variation given by equation (1) from the combined temperature prior to averaging. However, the sampling of the day-night cycle is reasonably complete most of the time, giving no noticeable improvement in the temperature-clock period relationship compared to Fig. 4b, or in the synthesized clock period and phase time histories compared to Figs. 5, 6a, and 6b. We therefore abandoned this improvement as being an unproductive complication in the procedure to recover the clock phase. [Top of page] [Next: Discussion] [Previous: Clock Period] [Back to Analysis] |
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